Accessible pinout for Z8420
Part description: Parallel I/O, DIP-40
Package description:
This package has two parallel rows of pins extending down from opposite edges of the chip.
There should be a semicircular notch that you can feel in the middle of one of the package's shorter bare edges. With the pins facing downward and the chip oriented so notch is on the side of the chip furthest from you, Pin 1 will be in the far left corner of the chip.
Pins are numbered counter-clockwise. Numbers increase from the far left corner to the near left corner. They then continue on the right side, increasing from the near right corner to the far right corner. Thus the highest number pin is to the right of pin 1.
Pin assignments
Left side (numbering starts at far end)
| Pin | Signals |
|---|---|
| 1 | D2 |
| 2 | D7 |
| 3 | D6 |
| 4 | CE (active low) |
| 5 | C / D (active low) |
| 6 | B / A (active low) |
| 7 | PA7 |
| 8 | PA6 |
| 9 | PA5 |
| 10 | PA4 |
| 11 | GND |
| 12 | PA3 |
| 13 | PA2 |
| 14 | PA1 |
| 15 | PA0 |
| 16 | ASTB (active low) |
| 17 | BSTB (active low) |
| 18 | ARDY |
| 19 | D0 |
| 20 | D1 |
Right side (numbering starts at near end)
| Pin | Signals |
|---|---|
| 21 | BRDY |
| 22 | IEO |
| 23 | INT (active low) |
| 24 | IEI |
| 25 | CLK |
| 26 | VCC |
| 27 | PB0 |
| 28 | PB1 |
| 29 | PB2 |
| 30 | PB3 |
| 31 | PB4 |
| 32 | PB5 |
| 33 | PB6 |
| 34 | PB7 |
| 35 | RD (active low) |
| 36 | IORQ (active low) |
| 37 | M1 (active low) |
| 38 | D5 |
| 39 | D4 |
| 40 | D3 |
This pinout was automatically generated from the KiCAD symbol library revision 164574.
It is possible that there may be a mistake in the source data leading to wrong information on this page.